Flow Overview
- The NitroSIM compiler compiles design files (RTL or gate-level) into instructions for execution on the NitroSIM card.
- Your simulator compiles the top level shell that the NitroSIM compiler generates.
- Your simulator (master) runs the top level shell on a host CPU that interfaces with the NitroSIM card (slave).
In hybrid simulation, logic simulation is accelerated by concurrent simulation instruction execution on a general-purpose CPU and a grid of VLIW processors supported by an ultra-high bandwidth memory architecture.